SOPHIA ANTIPOLIS, France – June 10, 2025 │ KnowMade today announced the publication of its Q1 2025 IP report on GaN electronics, highlighting robust patenting activity across both power and RF segments. Amid on-going patent disputes between leaders in the power GaN device market, companies keep executing their strategy to address this market. Recent patent filings emphasize critical aspects of power GaN technology such as gate design and packaging, resulting in sustained patent portfolio growth. Meanwhile, key RF market players keep expanding their IP activities in the RF GaN landscape, underlining the technology’s critical role in next-generation wireless applications.

Q1 2025 GaN Electronics IP Activity at a Glance

During the first quarter of 2025, a total of 540 new patent families were published, with Xidian University and major Chinese entities such as CETC and Innoscience leading the patent filings, followed by contributions from Nuvoton, STMicroelectronics, and Toshiba. Over 330 patent families were granted for the first time, notably reinforcing portfolios at Innoscience, STMicroelectronics, Infineon, Navitas, and EPC, alongside significant grants to Panasonic and TSMC. The quarter also saw more than 110 patents abandoned and over 70 patents expired, primarily from well-established patent holders including Wolfspeed, Infineon, and Fujitsu.

Approximately 10 IP collaborations (patent co-filings) were recorded, most partnerships formed between industry and academic organizations. For instance, Safran published a patent application with CNRS, CNAM and several universities in Paris, for an on-board aeronautical power circuit with active filtering. Also, Volkswagen cooperated with the University of Tennessee on GaN-based three-level active neutral point clamped power module designs, resulting in joint patent publications in Q1 2025.

Nearly 40 patent transactions took place this quarter, predominantly within China, such as the transfer of several RF GaN patents from Xidian University to Huawei and power module company Macmic Science & Technology’s acquisition of a GaN device patent from UESTC.

In addition, a new lawsuit was initiated in February 2025 when Innoscience appealed to the U.S. Court of Appeals to challenge the U.S. International Trade Commission’s ruling in last November on EPC’s patent US 8,350,294.

Top Innovators in Power GaN

Toshiba, Texas Instruments (TI), and Rohm each published more than six new inventions. In particular, Rohm introduced multiple innovations aimed at enhancing the reliability of normally-off GaN devices by leveraging p‑GaN gate layer techniques and superlattice buffer structures. TI unveiled a novel gate structure incorporating a p‑type poly‑Si layer to decouple parasitic capacitances and improve gate depletion behavior, alongside trench-based substrate-to-source connections for GaN power devices and a HEMT design featuring a doped barrier to boost threshold voltage stability and drain current stability. Moreover, TI disclosed a packaging solution wherein a GaN FET is co-packaged with its driver for optimized half-bridge modules.

Leading RF GaN Developments

Sony, Sumitomo Electric, and Macom disclosed six, five, and four RF-focused inventions, respectively. While Sumitomo Electric and Sony were focused on RF GaN device designs, Macom’s patenting activity related to RF amplifier circuitry and advanced packaging techniques.

Interestingly, Sumitomo Electric focused on RF GaN-on-SiC devices fabricated on nitrogen-polarity GaN epitaxial structures. Academic research also made a significant contribution on this topic with UCSB publishing an invention that improves the linearity of deep-recess GaN MIS‑HEMTs through corrugation of N-polar structures. MONDE Wireless, a UCSB spin-off, also mentioned N-polar GaN HEMTs grown on miscut substrates in another Q1-2025 patent publication.

Emerging players

New entrants to the GaN electronics IP landscape were predominantly Chinese, with LED manufacturer Anhui GaN Semiconductor filing several epiwafer patent applications for both power and RF uses, and battery manufacturer CATL submitting its first GaN-related invention targeting battery management systems. In the U.S., Tesla entered the arena with a packaged integrated circuit device featuring enhanced power surge heat dissipation, and Soctera, a Cornell University spin-off, proposed a GaN device structure using an AlN back barrier layer and in-situ two-step passivation process to mitigate current collapse.

KnowMade’s GaN Electronics Patent Monitoring Service

Subscribing to KnowMade’s GaN Electronics Quarterly Patent Monitor provides timely insights into emerging technologies and competitor activities. This service offers comprehensive quarterly analysis reports accompanied by an updated patent database, essential tools for tracking competitors’ IP developments and uncovering strategic opportunities.

The added value of this monitoring service lies in year-round access to a dedicated analyst, enabling you to request additional research on specific technologies or companies’ patent portfolios, and to customize the monitoring service by including specific players and/or segments to better suit your strategic needs.

Reach out to us at contact@knowmade.fr for subscriptions and further details.

Press contact
contact@knowmade.fr
Le Drakkar, 2405 route des Dolines, 06560 Valbonne Sophia Antipolis, France
www.knowmade.com

About KnowMade
KnowMade is a Technology Intelligence and IP Strategy consulting company specialized in analysis of patents and scientific information. The company helps innovative companies and R&D organizations to understand their competitive landscape, follow technology trends, and find out opportunities and threats in terms of technology and patents.
KnowMade’s analysts combine their strong technology expertise and in-depth knowledge of patents with powerful analytics tools and methodologies to turn patents and scientific information into business-oriented report for decision makers working in R&D, Innovation Strategy, Intellectual Property, and Marketing. Our experts provide prior art search, patent landscape analysis, scientific literature analysis, patent valuation, IP due diligence and freedom-to-operate analysis. In parallel the company proposes litigation/licensing support, technology scouting and IP/technology watch service.
KnowMade has a solid expertise in Compound Semiconductors, Power Electronics, Batteries, RF Technologies & Wireless Communications, Solid-State Lighting & Display, Photonics, Memories, MEMS & Solid-State Sensors/Actuators, Semiconductor Manufacturing, Packaging & Assembly, Medical Devices, Medical Imaging, Microfluidics, Biotechnology, Pharmaceutics, and Agri-Food.

SOPHIA ANTIPOLIS, France – December 18, 2023 │ The GaN newsletter for December 2023 is now available! This monthly newsletter allows you to keep up to date on the latest scientific publications, patent applications, and news related to III-Nitride semiconductors (GaN, AlN, InN, and alloys) for optoelectronic and electronic applications (power, RF, LED, laser, photonics, and so on). This month, let us highlight Intel’s latest developments in GaN electronics to address the increasing power density and efficiency needs of data centers and networking platforms.

Intel advances GaN IC technology for power management

In December’s issue, KnowMade reports on a recent news from Intel. At IEDM 2023, the company introduced its DR (driver) GaN or DrGaN, which monolithically integrates a CMOS driver with GaN power switches on a 300mm GaN-on-Si platform. This work shows that it is possible to co-integrate the Si PMOS transistor with GaN transistors while maintaining the high figure of merit (FoM) to keep up with the growth of power density. According to the company, the new DrGaN device can address the power requirements of future CPUs and GPUs, showing excellent resistance and leakage performance. This is made possible by the development of a new gate-last process flow for 3D monolithic integration of GaN and Si CMOS, that leverages layer transfer technology (Figure 1). Interestingly, using this technological approach, Intel circumvents the challenging task of fabricating p-channel GaN devices, that would be required in a DrGaN device integrally made of GaN.

Figure 1: (a) The new process flow for the 3D monolithic integration of GaN and Si CMOS by layer transfer. (b) The new 3D monolithic integration of GaN and Si CMOS by this process. (c) The layout of a 40×10µm2 180nm DrGaN unit cell. Source: Paper 9.7, “DrGaN: an Integrated CMOS Driver-GaN Power Switch Technology on 300mm GaN-on-Si with E-mode GaN MOSHEMT and 3D Monolithic Si PMOS,” H.W. Then et al, Intel, IEDM 2023.

Yet this approach also rises major challenges related to the integration of Si and GaN technologies, especially challenges due to the thermal budget of their respective processes. As shown in Figure 1, Intel aims to address this challenge by completing the high-temperature activation steps for the Si CMOS transistors before depositing the GaN transistor’s gate dielectric. What’s more, this method allows GaN and Si CMOS transistors to share the same backend interconnect stack, which reduces resistance and mask count. With a FoM of 0.59 (mΩ-nC)^-1 for a 30nm gate-length GaN MOS-HEMT, the new technology exhibits a promising potential for future scaling of the architecture.

This achievement is another milestone after previous breakthroughs in RF and power GaN technologies. It accelerated in 2018/2019 with the first report on the development of a 300-mm GaN-on-Si technology, dedicated to power supply of user equipment and future use of mmW frequencies for wireless LAN capability. Last year, Intel announced a 20X improvement over state-of-the-art e-mode p-GaN HEMT in a key FoM for power delivery (Figure 2). Concomitantly, with the same device architecture, Intel announced record cutoff frequencies, a critical FoM for communications.

Figure 2: Intel’s previous research breakthroughs introduced at IEDM 2022. Source: Scaled submicron field-plated e-mode high-K GaN transistors on 300mm Si(111) wafer with power FoM (RON xQGG) of 3.1 mohm-nC at 40V and fT/fMAX of 130/680GHz, IEEE Int. Electron Devices Meeting Tech. Dig., 111 (2022), pp. 35.1.1-35.1.4.

In the power GaN landscape, Intel competes with Navitas, Cambridge GaN Devices (CGD), EPC and others that have been developing power GaN integrated circuits (IC). Yet Intel stands out as the only company to focus on harnessing efficiency of GaN for 48V and below, according to Paul Fisher, Director of Chip Mesoscale Process Development at the Components Research at Intel. In the RF GaN landscape, Intel stands out as one of the main players actively pushing GaN-on-Si technology with Infineon, MACOM, GlobalFoundries and others. Their advances in GaN devices and circuits at higher mm-wave frequencies were reviewed by a recent paper from Fraunhofer IAF and Albert-Ludwigs-Universität Freiburg that KnowMade reported in the GaN newsletter earlier this year. What’s more, apart from the recent conference papers, Intel published a couple of scientific papers in 2023, describing e-mode 300-mm GaN-on-Si(111) with integrated Si CMOS, for future mm-wave RF applications (published in April) and dealing with the assessment of T-Gate and Π -Gate HEMT, through cellular Monte Carlo simulations (co-published with Arizona State University in September). In the first paper, Intel’s principal engineer Han Wui Then et al. reported a new record f_MAX  = 700 GHz ( f_T = 115 GHz) with an L_G = 50 nm GaN MOS-HEMT having a submicrometric source field plate fabricated using a 300-mm GaN MOS-HEMT process with integrated Si CMOS.

Intel has resumed its IP activities in GaN electronics

KnowMade recently published a GaN electronics IP report analyzing both RF and power GaN patent landscapes. Intel entered the GaN electronics patent landscape in 2013 and accelerated its IP strategy in 2017-2019 (Figure 3), with a focus on GaN-on-Si technology. While GaN-on-Si is the mainstream platform for power applications, it has not been adopted yet in RF applications, where the GaN-on-SiC platform dominates. KnowMade’s report analyzed the position of the main players in the RF GaN IP competition. Interestingly, Intel stands as one of the best-established players for GaN-on-Si epiwafers, and as an undisputable leader for GaN-on-Si devices, far ahead of its main challengers such as MACOM and TSMC.

Figure 3: Intel’s patenting activity in the GaN electronics patent landscape (source: GaN electronics patent landscape report, KnowMade, November2023)

The number of GaN electronics patent publications abruptly dropped in 2021, following COVID-19 pandemic. This sharp decrease in patent filings has not been observed only for GaN electronics, since Intel’s patent filings overall dropped by 50% from 2019 to 2020. Yet Intel has maintained most of its GaN electronics patents alive during this break. What’s more, Intel has resumed its patenting activity in the GaN electronics field lately, confirming the position of GaN electronics in its technology roadmap. Indeed, more than 15 new patent applications were published by Intel in 2023, identified in KnowMade’s GaN newsletter and analyzed in more details in KnowMade’s GaN electronics patent monitor. This inventive activity is led by two main inventors: Principal Engineer Han Wui Then and Integration Group Leader Marko Radosavljevic. The recent patent publications describe several inventions leveraging layer transfer technology for GaN IC fabrication, such as US20230090106, US20230069054, US20230197732 and US20230054719. Furthermore, other recent inventions address critical aspects of the gate structure (e.g., patent US20230197840, Figure 4).

Figure 4: Gate structure to enable lower subthreshold slope in GaN transistors (US20230197840)

Eventually, the GaN electronics IP report highlights an IP strategy centered on the US (200+ patent applications) and Taiwan (90+). Intel’s patenting activity for GaN electronics has been relatively limited in other countries. Yet the strongest progression in patent filings is presently seen in Europe, which is consistent with the recent ambitions of Intel to expand its activities in Europe, from R&D and manufacturing all the way to packaging.

Press contact
contact@knowmade.fr
Le Drakkar, 2405 route des Dolines, 06560 Valbonne Sophia Antipolis, France
www.knowmade.com

About the author
Rémi Comyn works for KnowMade as a Patent Analyst in the field of Compound Semiconductors and Electronics. He holds a PhD in Physics from the University of Nice Sophia Antipolis (France) in partnership with CRHEA-CNRS (Sophia Antipolis, France) and the University of Sherbrooke (Québec, Canada). Rémi previously worked in compound semiconductors research laboratory as Research Engineer.

About KnowMade
KnowMade is a Technology Intelligence and IP Strategy consulting company specialized in analysis of patents and scientific information. The company helps innovative companies and R&D organizations to understand their competitive landscape, follow technology trends, and find out opportunities and threats in terms of technology and patents.
KnowMade’s analysts combine their strong technology expertise and in-depth knowledge of patents with powerful analytics tools and methodologies to turn patents and scientific information into business-oriented report for decision makers working in R&D, Innovation Strategy, Intellectual Property, and Marketing. Our experts provide prior art search, patent landscape analysis, scientific literature analysis, patent valuation, IP due diligence and freedom-to-operate analysis. In parallel the company proposes litigation/licensing support, technology scouting and IP/technology watch service.
KnowMade has a solid expertise in Compound Semiconductors, Power Electronics, Batteries, RF Technologies & Wireless Communications, Solid-State Lighting & Display, Photonics, Memories, MEMS & Solid-State Sensors/Actuators, Semiconductor Manufacturing, Packaging & Assembly, Medical Devices, Medical Imaging, Microfluidics, Biotechnology, Pharmaceutics, and Agri-Food.

SOPHIA ANTIPOLIS, France – December 5, 2023 │ Knowmade is releasing a new GaN intellectual property (IP) report providing a deep dive into the power GaN and RF GaN electronics patents worldwide. In this report, both power GaN and RF GaN patent landscapes have been analyzed in a view to describe the global IP competition across the whole supply chains and the local ecosystems emerging to support the industrialization of GaN technologies.

More and more players exhibit a common IP strategy for power GaN and RF GaN technologies

In addition to power GaN and RF GaN patents, KnowMade’s GaN Electronics IP report considers the impact of generic GaN electronics patents, applicable to both power and RF applications, on the global IP competition (Figure 1).

Figure 1: Main companies in the GaN electronics patent landscape.

For instance, some companies, such as United Microelectronics Corporation (UMC), don’t limit the application scope in most of their GaN electronics inventions, showing a common IP strategy for both RF and power markets. What’s more, well-established power GaN market players, such as Infineon Technologies and Innoscience, own high numbers of generic GaN electronics patents, that could be leveraged for RF applications in the next few years.

Power GaN patent landscape: a focus on national and regional ecosystems

The inventive activity used to be dominated by Japanese players (2001 – 2015) until Chinese players took over the IP leadership in 2016. As a result, Japanese and Chinese players have produced more than 70% of all power GaN inventions together (Figure 2). Such intensive patenting activities are eclipsing important IP trends occurring in other regions (US, Europe, etc.). KnowMade’s GaN Electronics report unveils such IP trends providing separate analyses of the regional ecosystems in the power GaN patent landscape.

Figure 2: Main players in the power GaN patent landscape, split by country.

The GaN Electronics Patent Landscape report points out that most of the historical Japanese IP players are focusing on monetizing their power GaN IP portfolios (Sharp, Furukawa Electric, NTT, Fujitsu). Few of them are still actively filing patent applications to consolidate their IP position, but Fujitsu and Panasonic, in different parts of the supply chain. However, new Japanese IP leaders such as ROHM and Sumitomo Chemical are now aiming to turn their IP leadership into market leadership.

Taiwanese players are rising in the power GaN IP landscape, with most of the main Taiwanese foundries ramping up their activities across the power GaN supply chain, following TSMC’s lead. The Taiwanese IP activities highlight a reinforcement of the domestic supply chain for power GaN technology, with major players actively filing patents in the upstream supply chain (e.g., GlobalWafers) and accelerating their patent filings in the downstream supply chain (e.g., Delta Electronics). What’s more, several newcomers have entered the power GaN IP landscape in Taiwan lately.

The US-China trade war adds a new dimension to the power GaN IP competition, urging players to adapt their strategy in a view to secure the development of their power GaN activities internationally. In this context, several Chinese players such as Innoscience and Huawei are expanding their IP activities worldwide, looking to compete in the US and European markets.

Most of the main US market players don’t have a complete IP coverage of the power GaN supply chain. Instead, US players leverage IP and manufacturing partnerships and/or existing IP and know-how developed for other power semiconductor technologies (Si, SiC). According to their own patenting activities, main US market players are consolidating their own IP position in Asia and Europe, to support the development of their market activities outside the US.

Infineon is the main vertically integrated innovator in the power GaN IP landscape, with a global IP strategy aiming to cover the main important regions for power electronics. Since 2015, Infineon has successfully leveraged multiple acquisitions (GaN Systems, International Rectifier) and IP partnerships (Panasonic) in a view to accelerate its strategy in the power GaN market. In Europe, major research organizations (Cea, imec, Fraunhofer) are driving the establishment of a domestic supply chain, leading to the establishment of new startup companies, and to the emergence of more vertically integrated innovators such as STMicroelectronics.

RF GaN patent landscape: a look into the IP strategies of key players across the supply chain

The GaN Electronics Patent Landscape report highlights different views from RF GaN market players about what innovation will be critical to protect in order to impact the future RF GaN supply chain (Figure 3). For instance, several incumbent players in the RF GaN market seem to consider wafer and epiwafer IP as less critical, while others, such as Sumitomo Electric, Raytheon and Mitsubishi Electric, are still competing in this IP space. Most vertically integrated players identified in this report are still focusing on the IP related to RF GaN devices. In this regard, NXP stands out as it soon shifted its focus to the downstream supply chain. It was followed by most of the main RF GaN market players which are now consolidating their IP position in packaging, modules, circuits and applications.

In recent years, Wolfspeed has taken over the IP leadership across the whole RF GaN supply chain, except for wafers and epiwafers (Figure 3). Just like Wolfspeed, MACOM has been actively filing patents across the RF GaN supply chain. Yet unlike Wolfspeed, MACOM’s IP activity did not translate into a global IP leadership. With the acquisition of Wolfspeed’s RF business, MACOM is expected to catch up with the competition in the global RF GaN IP landscape. Interestingly, this acquisition virtually positions MACOM as an undisputable IP leader for circuits and applications. Another stand-out player emerging in the RF GaN patent landscape is Mitsubishi Electric: it is currently the only vertically integrated innovator which is still competing across the whole RF GaN supply chain.

In contrast with the power GaN patent landscape, US players have established a complete IP coverage of the RF GaN supply chain and this IP ecosystem have been reinforced by many startup companies actively filing patent applications in different part of the supply chain during the last decade (Akoustis, Akash Systems, Eridan, Finwave, etc.). The analysis of their IP strategies shows that US companies are now expanding their patenting activities outside the national territory, especially in Europe, China and Taiwan, to support their international ambitions in the growing RF GaN market.

Figure 3: IP leadership of patent assignees in the upstream part (wafers, epiwafers, devices) and the downstream part (packaging, modules, circuits, applications) of the RF GaN supply chain.

In the wafer and epiwafer IP space, the competition is now taking multiple and different directions: GaN-on-Si (IQE, Shin Etsu), GaN-on-diamond (RFHIC, Akash Systems), GaN-on-engineered substrates (Soitec, Qromis, Shin Etsu), GaN-on-AlN (Fujitsu), in addition to the mainstream GaN-on-SiC platform (Sumitomo Electric, Sumitomo Chemical). Regarding the GaN-on-Si platform, the GaN Electronics IP report highlights a reduction in patent filings from most well-established IP players. In this context, Intel continues to lead the competition in the RF GaN-on-Si IP landscape, especially for RF GaN-on-Si devices. Aside from Intel, MACOM and TSMC are the main established IP players still actively filing patent applications for RF GaN-on-Si technology. Interestingly, the other Taiwanese foundries are following TSMC’s lead. What’s more, many power GaN IP players were seen to file RF GaN patent applications lately (Innoscience, Infineon, ST), indicating the development of RF GaN devices in a view to enter the RF telecom market with GaN-on-Si and/or other unconventional platforms such as engineered substrates (Qromis-VIS) or semi-insulating SiC on conductive SiC substrates (ROHM).

For a decade, Knowmade has investigated the full spectrum of GaN technology providing numerous GaN IP reports in optoelectronics, RF, and power electronics. What’s more, Knowmade’s GaN newsletter and patent monitoring services provide you with the latest updates on GaN technology and the flexibility to focus on the most critical aspects depending on your markets and your position in the value chain.

Press contact
contact@knowmade.fr
Le Drakkar, 2405 route des Dolines, 06560 Valbonne Sophia Antipolis, France
www.knowmade.com

About the author
Rémi Comyn works for KnowMade as a Patent Analyst in the field of Compound Semiconductors and Electronics. He holds a PhD in Physics from the University of Nice Sophia Antipolis (France) in partnership with CRHEA-CNRS (Sophia Antipolis, France) and the University of Sherbrooke (Québec, Canada). Rémi previously worked in compound semiconductors research laboratory as Research Engineer.

About KnowMade
KnowMade is a Technology Intelligence and IP Strategy consulting company specialized in analysis of patents and scientific information. The company helps innovative companies and R&D organizations to understand their competitive landscape, follow technology trends, and find out opportunities and threats in terms of technology and patents.
KnowMade’s analysts combine their strong technology expertise and in-depth knowledge of patents with powerful analytics tools and methodologies to turn patents and scientific information into business-oriented report for decision makers working in R&D, Innovation Strategy, Intellectual Property, and Marketing. Our experts provide prior art search, patent landscape analysis, scientific literature analysis, patent valuation, IP due diligence and freedom-to-operate analysis. In parallel the company proposes litigation/licensing support, technology scouting and IP/technology watch service.
KnowMade has a solid expertise in Compound Semiconductors, Power Electronics, Batteries, RF Technologies & Wireless Communications, Solid-State Lighting & Display, Photonics, Memories, MEMS & Solid-State Sensors/Actuators, Semiconductor Manufacturing, Packaging & Assembly, Medical Devices, Medical Imaging, Microfluidics, Biotechnology, Pharmaceutics, and Agri-Food.

SOPHIA ANTIPOLIS, France – November 16, 2023 │ The quarterly report for Q3 2023 GaN Electronics patent monitor is now available. This monitoring service allows you to keep up to date on GaN-related patent activity for RF & Power electronics: new patent publications, newly granted patents, patents expired or abandoned, latest patent transfers and patent litigation.

This quarter, let us focus on a new entrant in the power GaN IP landscape: GaNcool.

Anticipating opportunities and risks through patent watch

Gallium nitride (GaN) is the technology of choice for applications that require high frequency, high voltage, and high-power density. GaN has made impressive progress in material and process technologies, resulting in significant improvements in device performance for both power and RF applications. Today, more and more companies are adopting GaN devices into their electronics components, making GaN market more competitive. Patenting your innovative technology grants you a monopoly on your invention and protect it from its use by competitors in countries where your patent is in force. However, you also must be sure that what you intend to put on the market is not in the claims’ scope of patents from competitors. To manage that risk, Knowmade provides you with a reliable GaN Electronics patent monitoring service, which regularly follows patents from publication, and granting until they expire or are abandoned. Our quarterly patent monitor’s reports and databases not only give you a clear vision of your competitors’ strategies and future intentions, but also help you keep track of the latest technology and early detect new entrants in your business field. Through our GaN Electronics patent monitor, you can visualize existing technology and its trends that inform your present strategy and help you build a business strategy suitable for the future market.

Power GaN applications drive the GaN electronics patent activities

In our quarterly analysis, the GaN electronics patents are categorized into different segments of applications, supply chains, and technical challenges. The temporal evolution of new patent applications by segments reflects the level of investment in R&D and helps you visualize the technological and market trends. Let’s take an example of application segmentation, in which the new patent families (inventions) are divided into RF and power applications.

Figure 1: Distribution of new patent families by application over the last three years (source: Knowmade’s GaN Electronics Quarterly Patent Monitor).

It is obviously seen in figure 1 that, over the last three years, from 2021 to 2023, the share of new patent publications related to GaN RF fell slowly from 30% to 20% of the total published GaN electronics patents whereas the space of GaN power tended to increase from 50% to 60%. To meet the growing demands for automotive, e-mobility, and power supply for data centers, GaN intellectual property (IP) leaders such as Mitsubishi Electric, Texas Instruments, Infineon, Rohm, Innoscience, and Fuji Electric, have stepped up their patent activities in power GaN applications since 2021. Additionally, new entrants, mainly from China, are also focusing on expanding their IP activities for power GaN applications. In Q3 2023, over 15 IP newcomers were identified in GaN electronics patent landscape, more than half of them are Chinese entities, with around 60% of their new inventions related to power applications. Among the IP newcomers, we noticed a GaN pure player – GaNcool – whose patent publications are analyzed in the following section.

GaNcool, a new GaN pure player entering power GaN competition

GaNcool (Fuzhou Gallium Valley Semiconductor, 福州镓谷半导体, www.gancool.com) was founded in 2022 by former Bell Labs scientists and Chinese semiconductor experts according to its corporate website. In Q3 2023, GaNcool published its first five domestic patent applications. The names of the inventors, Zhu Qing (祝庆) and Feng Wenjun (冯文军), do not provide additional information about the background of GaNcool’s founders mentioned above. Yet in a press release from Fuzhou New Area earlier this year, Hu Liang (梁琥), is introduced as the current CTO of GaNcool. Hu Liang, who graduated from Hong Kong University of Science and Technology and Beijing Normal University, is also director of the epitaxy department of another GaN company in Europe, BelGaN. What’s more, he previously worked at imec for which he filed two GaN electronics patent applications (US10636882, US10312083). The inventions deal with III-nitride selective growth methods using masking layers, which can be used for the fabrication of GaN transistors. As such, they belong to the same field as the inventions disclosed by GaNcool this quarter.

GaNcool focuses on the development and production of GaN wafers intended to produce integrated circuits. It claims to have reached the status of mass production for GaN-on-Si wafers, and to have on-going developments for GaN-on-sapphire and GaN-on-SiC platforms. When GaN is grown on foreign substrates, the mismatches in lattice constants and thermal expansion coefficients lead to high defect density, deformation, wrapping or even cracks. This prevents the use of these substrates in high power applications. To overcome this bottleneck, GaNcool provides a method of using double-sided growth technology on sapphire substrates. As claimed in the patent application CN116544194 published in Q3 2023, the GaN epitaxial layer is grown on the front side of the substrate, and stress control layer followed by a SiN protective layer are prefabricated on the back side of the substrates (Figure 2). The stress control layer includes a low-temperature GaN buffer layer, a 3D GaN layer and an undoped GaN layer, in which the thickness of the undoped GaN layer is tuned to compensate for the tensile stress created by the GaN epitaxial layer. According to the inventors, the wrapping degree is significantly reduced, providing crack-free epilayers for the fabrication of high-power devices.

Figure 2: Schematic diagram of double-sided growth technology of GaN-on-sapphire adapted from GaNcool’s patent application CN116544194.

Although the lateral GaN-on-Si devices have gained a great space in power applications, their markets are still limited to the low voltage range (650 V and under). Vertical GaN devices are proposed to overcome the voltage limitations of the lateral devices. To expand its IP strategy to high voltage applications, GaNcool has developed some methods for the fabrication of vertical GaN devices, with four new patent publications identified in Q3 2023. These inventions provide technical solutions to overcome i) poor activation of the p-GaN layer (CN116705607), ii) surface damage at the bottom and the side wall of the gate trench caused by etching (CN116544105), iii) early breakdown due to current crowding (CN116741810), iv) GaN etching or decomposition during cooling down and the introduction of impurities to the GaN surface during device processing (CN116825619).

Figure 3: (a), (b), (c), (d) Schematic diagrams of the vertical GaN structures adapted from GaNcool patent applications CN116705607, CN116544105, CN116741810, CN116825619, respectively.

In the conventional vertical GaN device, high p-doped GaN is still difficult to achieve due to poor activation of the p-GaN layer. In the patent application CN116705607, GaNcool uses a SiO₂ or SiN mask to form a deposition groove on the n-GaN top layer (Figure 3 (a)). Then a trapezoid-shaped p-GaN layer is grown into the deposition groove with a height higher than the mask layer. After N-ions are implanted into the surface of the p-GaN layer, the ions are activated through an annealing process. It is well known that the Mg-doped p-GaN grown by MOCVD is usually activated by annealing the sample with gases to break the strong Mg-H bonding and activate the Mg acceptor. In conventional structures, the p-GaN layer is generally covered by epitaxial layers (cap layers, for example), that prevent the action of the annealing to break the Mg-H bonding. In this invention, the trapezoid-shaped increases the surface contact area of the p-GaN layer with the annealing gases, thereby promoting the activation process.

For vertical GaN power transistors, the gate trench is generally formed by plasma etching which introduces additional surface damage at the bottom and side walls of the groove. That will cause an increase in interface defects, abnormal electrical performance, and problems with the instability and reliability of the gate. To solve the damage caused by dry etching, GaNcool’s inventors developed an etching process using synchronous growth in the MOCVD (CN116544105). In this invention, after patterning the SiO₂ to reveal the GaN surface, the wafer is transferred into the MOCVD, where it is exposed to the H₂, NH₃, and trimethyl gallium (TMG) gases. The gas flows of H₂ and TMG are controlled to have GaN etching and growth at the same time, in which the etching rate is greater than the growth rate. This method provides a gate trench with minimized surface damage. Then a p-GaN layer can be grown into the groove, as shown in Figure 3 (b). Using this technique, after etching, the wafer is not taken out of the MOCVD, and groove surface treatment is directly carried out in the MOCVD. So, besides providing a groove with a smooth surface, the method also prevents the introduction of impurities and additional oxidation of the interface, caused by the exposure of the wafer to the air.

Using the etching process claimed in the patent application CN116544105, GaNcool then develops a method to grow an p-GaN/n+-GaN heterostructure into the groove with a larger interface (CN116741810). In this invention, after the groove is formed by the etching process in the MOCVD reactor, a p-GaN layer is grown on the periphery of the groove with a mushroom head structure. Then, a n+ GaN layer with a trapezoid shape is grown on top of the p-GaN layer (Figure 3(c)). This method can increase the interface between p-GaN and n+-GaN layers, leading to an increase in current spreading and limiting the occurrence of current breakdown in GaN electronic devices based on this structure.

Furthermore, GaNcool disclosed the growth of an in-situ SiN passivation mask on top of a vertical GaN structure (CN116825619). Different from the three other inventions where the SiO₂ or SiN masks are deposited by using PECVD, in this invention the SiN passivation mask is formed directly on top of the n-GaN layer after the heterostructure is grown in the MOCVD reactor (Figure 3 (d)). The advantage pertained to this invention is that the GaN surface is protected by the SiN mask from any etching or decomposition when the temperature is reduced. The SiN mask also prevents the introduction of impurities on the GaN surface during the device processing. Additionally, the SiN mask and the GaN layer have good matching performance, so the problems of cracking caused by differences in thermal expansion can also be avoided.

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About the author
Huong NGO, PhD., works at KnowMade as a Patent Analyst in the field of Compound Semiconductors and Optoelectronics. She holds a PhD in Physics from the University of Montpellier (France). Huong previously worked at Meijo University (Japan), CRHEA-CNRS (France), and Lafayette Institute (France) as Research Engineer.

About KnowMade
KnowMade is a Technology Intelligence and IP Strategy consulting company specialized in analyzing patents and scientific publications. The company helps innovative companies, investors, and R&D organizations to understand their competitive landscape, follow technological evolutions, reduce uncertainties, and identify opportunities and risks in terms of technology and intellectual property.
KnowMade’s analysts combine their strong technology expertise and in-depth knowledge of patents with powerful analytics tools and methodologies to turn patent information and scientific literature into actionable insights, providing high added value reports for decision makers working in R&D, innovation strategy, intellectual property, and marketing. Our experts provide prior art search, patent landscape analysis, freedom-to-operate analysis, IP due diligence, and monitoring services.
KnowMade has a solid expertise in Compound Semiconductors, Power Electronics, Batteries, RF Technologies & Wireless Communications, Solid-State Lighting & Display, Photonics, Memories, MEMS & Sensors, Semiconductor Packaging, Medical Devices, Medical Imaging, Microfluidics, Biotechnology, Pharmaceutics, and Agri-Food.

SOPHIA ANTIPOLIS, France – October 27, 2023 │The GaN newsletter for October 2023 is now available! This monthly newsletter allows you to keep up to date on the latest scientific publications, patent applications, and news related to III-Nitride semiconductors (GaN, AlN, InN, and alloys) for optoelectronic and electronic applications (power, RF, LED, laser, photonics, and so on).

This month, let us highlight the latest developments related to QST substrate technology for power GaN and RF GaN devices.

Qromis’ QST engineered substrate for GaN power electronics.

During heteroepitaxy, the lattice-constant and thermal-expansion-coefficient (CTE) mismatch between the epitaxial layer and the substrate results in the generation of defects either during growth or during cooling from growth temperature to room temperature. Qromis Substrate Technology (QST) solves the limitations of CTE mismatch by employing a core wafer CTE and presenting a Si (111) surface for GaN epitaxy. The CTE-matched core is made of poly-AlN ceramic and is surrounded by several dielectric layers (Thermal Management of Gallium Nitride Electronics, Woodhead Publishing P. 251-274). Following that, another dielectric layer is produced to create a smooth surface on which a (111)-oriented Si layer is bonded. This Si surface is epi-ready, which allows the application of well-developed GaN-on-Si technology to grow thick GaN layers, which is essential for the manufacture of high-performance GaN power electronics.

Figure 1: The structure of QST engineered substrate (source: Qromis)

IMEC and Aixtron report 8.5 µm-thick GaN layers on 200 mm QST substrate.

In the latest scientific publication section of our GaN newsletter, we noticed that IMEC and AIXTRON research teams have successfully grown 5 µm GaN drift layers on 200-mm QST wafers in an AIXTRON G5+ C Planetary Reactor (5 x200 mm standard configuration). Optimized growth conditions result in GaN epitaxial layers that have low defect density and great uniformity, with total thicknesses of up to 8.5 µm. Using this structure, a semi-vertical diode with a breakdown voltage of 750 V is achieved. The growth of a high-quality thick GaN layer on the QST substrate enables higher breakdown voltages and better thermal management, making it a promising solution for vertical power devices.

Figure 2: (a) Cross-sectional SEM of GaN epitaxial layers grown on a QST substrate and (b) Back-to-back diodes reverse leakage and breakdown. (source: W Gonçalez Filho et. al., Sci Rep 13, 15931 (2023))

Shin-Etsu’s QST platform for power GaN and RF GaN markets

One of the notable press releases in this month’s GaN newsletter is that Shin-Etsu, a worldwide chemical company, announced its market entry strategy for GaN power devices. Besides the sales of QST substrates, Shin-Etsu Chemical will also provide GaN-on-QST wafers with diameters of 6 inches and 8 inches (wafers of 12-inch diameter are in development). In addition, the company also developed a technology that enables the growth of a 20 μm-thick GaN layer and facilitates the achievement of power devices with a breakdown voltage of 1800 V. Furthermore, Shin-Etsu Chemical cooperated with Oki Electric and succeeded in developing a method that allows the exfoliation of a thick layer of high-quality GaN from an insulating QST substrate and bonding it to other substrates. This method paves the way for the fabrication of high-power, high-quality vertical devices on 200-mm substrates. This will promote the manufacture of power devices with high yields and competitive pricing.

To support its market strategy, Shin-Etsu took a license on QST technology from Qromis while filing several patents related to this innovative technology. Although Shin-Etsu’s recent press release focuses on the power GaN market, its recent patenting activity indicates that the company also started advancing the QST platform for RF applications, anticipating new opportunities in the emerging RF GaN market. In this month’s GaN newsletter, we report Shin-Etsu’s new patent application WO2023/176185 which aims to improve the thermal conductivity and the mechanical strength of QST substrates. For that purpose, the inventors make possible the bonding of a modified type of AlN ceramic core (including fiber-like AlN single crystal) to a Si<111> seed layer via a flat sealing layer and a planarization layer. As a result, the thermal conductivity can be increased from 170 W/mK (upper limit of polycrystalline AlN ceramics) to 200 W/mK for AlN ceramics in which monocrystalline AlN fibers are introduced. Likewise, the fracture toughness of the AlN ceramic core can be improved from 3 MPa.m1/2 to 10 Mpa.m.1/2. What’s more the warping issue is alleviated, which may translate into a higher yield and lower cost for such epiwafers. These improvements promote the GaN-on-QST platform in demanding applications such as automotive applications and RF applications where thermal management remains critical. Especially, this new QST platform can be optimized to reduce high-frequency losses, by introducing a high-resistivity Si<111> seed layer (> 1 kΩ.cm), as claimed by Shin Etsu’s inventors in this new patent application.

Figure 3: Adapted drawing from Shin-Etsu’s patent application WO2023/176185

Vanguard International Semiconductor QST related patent activity

Another company, Vanguard International Semiconductor (VIS), a Taiwanese leader in IC foundry, also got the license from Qromis for QST technology in 2018. In previous months, VIS published a new patent application related to GaN-on-QST for power applications (US20230170389). The invention aims to prevent the Si seed layer from generating a back gating effect in the GaN HEMT and is applicable to GaN-on-QST or GaN-on-SOI platforms. In the October 2023 GaN newsletter, we report a new patent application from VIS related to QST substrates (US20230299146). The invention describes a superlattice buffer structure that prevents warpage and stabilizes the curvature of GaN epiwafers based on Si, SOI and QST substrates, on a wide range of thicknesses. According to VIS’ inventors, this structure is particularly suitable for high-power RF GaN-HEMTs, where a superlattice layer with thinner thickness and small bow variation is usually required to improve RF characteristics.

A GaN newsletter to help you make your way in various dynamic competitive landscapes

With the monthly GaN newsletter, KnowMade provides a cost-efficient way to access the different players’ recent R&D activities and latest collaborations, to have a complete picture of their strategies to enter the market at the right time, with the right products, and to detect new players worldwide early on. Combining both patent and paper analyses provides answers to many questions you might have about the players in your ecosystem. In the end, the GaN newsletter is also about detecting timely new threats and opportunities for your activities. As such, the GaN newsletter is valuable for researchers, engineers, and IP professionals, but it is also a powerful tool in the hands of marketing and innovation strategists and commercial teams.

The GaN newsletter can be subscribed to at any time directly from here. For more information about the GaN newsletter, please contact us at contact@knowmade.fr.

Press contact
contact@knowmade.fr
Le Drakkar, 2405 route des Dolines, 06560 Sophia Antipolis, France
www.knowmade.com

About the author
Rémi Comyn, PhD., works at KnowMade as a Patent Analyst in the field of Compound Semiconductors and Electronics. He holds a PhD in Physics from the University of Nice Sophia-Antipolis (France) in partnership with CRHEA-CNRS (Sophia-Antipolis, France) and the University of Sherbrooke (Québec, Canada). Rémi previously worked in compound semiconductors research laboratory as Research Engineer.
Huong NGO, PhD., works at KnowMade as a Patent Analyst in the field of Compound Semiconductors and Optoelectronics. She holds a PhD in Physics from the University of Montpellier (France). Huong previously worked at Meijo University (Japan), CRHEA-CNRS (France), and Lafayette Institute (France) as Research Engineer.

About KnowMade
KnowMade is a Technology Intelligence and IP Strategy consulting company specialized in analyzing patents and scientific publications. The company helps innovative companies, investors, and R&D organizations to understand their competitive landscape, follow technological evolutions, reduce uncertainties, and identify opportunities and risks in terms of technology and intellectual property.
KnowMade’s analysts combine their strong technology expertise and in-depth knowledge of patents with powerful analytics tools and methodologies to turn patent information and scientific literature into actionable insights, providing high added value reports for decision makers working in R&D, innovation strategy, intellectual property, and marketing. Our experts provide prior art search, patent landscape analysis, freedom-to-operate analysis, IP due diligence, and monitoring services.
KnowMade has a solid expertise in Compound Semiconductors, Power Electronics, Batteries, RF Technologies & Wireless Communications, Solid-State Lighting & Display, Photonics, Memories, MEMS & Sensors, Semiconductor Packaging, Medical Devices, Medical Imaging, Microfluidics, Biotechnology, Pharmaceutics, and Agri-Food.